From 060496fc6ee331e2710ff8ade23317a0a79cbd6c Mon Sep 17 00:00:00 2001 From: Eugen Wissner Date: Wed, 6 Nov 2024 22:23:49 +0100 Subject: Parse local variables --- lib/Language/Elna/RiscV/CodeGenerator.hs | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'lib/Language/Elna/RiscV/CodeGenerator.hs') diff --git a/lib/Language/Elna/RiscV/CodeGenerator.hs b/lib/Language/Elna/RiscV/CodeGenerator.hs index 4be7dfd..c082812 100644 --- a/lib/Language/Elna/RiscV/CodeGenerator.hs +++ b/lib/Language/Elna/RiscV/CodeGenerator.hs @@ -427,11 +427,11 @@ quadruple (GreaterOrEqualQuadruple operand1 operand2 goToLabel) then pure $ Vector.singleton $ unconditionalJal goToLabel else pure Vector.empty | VariableOperand variableOperand1 <- operand1 - , VariableOperand variableOperand2 <- operand2 = do + , VariableOperand variableOperand2 <- operand2 = let Store operandRegister1 = variableOperand1 Store operandRegister2 = variableOperand2 Label goToLabel' = goToLabel - pure $ Vector.singleton + in pure $ Vector.singleton $ Instruction $ RiscV.RelocatableInstruction RiscV.Branch $ RiscV.RBranch goToLabel' RiscV.BGE operandRegister1 operandRegister2 @@ -453,6 +453,15 @@ quadruple (GreaterOrEqualQuadruple operand1 operand2 goToLabel) $ Instruction $ RiscV.RelocatableInstruction RiscV.Branch $ RiscV.RBranch goToLabel' RiscV.BGE immediateRegister operandRegister2 +quadruple (AssignQuadruple operand1 (Store register)) + | IntOperand immediateOperand1 <- operand1 = pure + $ lui immediateOperand1 register + | VariableOperand variableOperand1 <- operand1 = + let Store operandRegister1 = variableOperand1 + in pure $ Vector.singleton + $ Instruction + $ RiscV.BaseInstruction RiscV.OpImm + $ RiscV.I register RiscV.ADDI operandRegister1 0 unconditionalJal :: Label -> Statement unconditionalJal (Label goToLabel) = Instruction -- cgit v1.2.3