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-rw-r--r--lib/Language/Elna/RiscV/CodeGenerator.hs13
1 files changed, 11 insertions, 2 deletions
diff --git a/lib/Language/Elna/RiscV/CodeGenerator.hs b/lib/Language/Elna/RiscV/CodeGenerator.hs
index 4be7dfd..c082812 100644
--- a/lib/Language/Elna/RiscV/CodeGenerator.hs
+++ b/lib/Language/Elna/RiscV/CodeGenerator.hs
@@ -427,11 +427,11 @@ quadruple (GreaterOrEqualQuadruple operand1 operand2 goToLabel)
then pure $ Vector.singleton $ unconditionalJal goToLabel
else pure Vector.empty
| VariableOperand variableOperand1 <- operand1
- , VariableOperand variableOperand2 <- operand2 = do
+ , VariableOperand variableOperand2 <- operand2 =
let Store operandRegister1 = variableOperand1
Store operandRegister2 = variableOperand2
Label goToLabel' = goToLabel
- pure $ Vector.singleton
+ in pure $ Vector.singleton
$ Instruction
$ RiscV.RelocatableInstruction RiscV.Branch
$ RiscV.RBranch goToLabel' RiscV.BGE operandRegister1 operandRegister2
@@ -453,6 +453,15 @@ quadruple (GreaterOrEqualQuadruple operand1 operand2 goToLabel)
$ Instruction
$ RiscV.RelocatableInstruction RiscV.Branch
$ RiscV.RBranch goToLabel' RiscV.BGE immediateRegister operandRegister2
+quadruple (AssignQuadruple operand1 (Store register))
+ | IntOperand immediateOperand1 <- operand1 = pure
+ $ lui immediateOperand1 register
+ | VariableOperand variableOperand1 <- operand1 =
+ let Store operandRegister1 = variableOperand1
+ in pure $ Vector.singleton
+ $ Instruction
+ $ RiscV.BaseInstruction RiscV.OpImm
+ $ RiscV.I register RiscV.ADDI operandRegister1 0
unconditionalJal :: Label -> Statement
unconditionalJal (Label goToLabel) = Instruction