Move assembly into the arch directory

arch/riscv/kernel.s

@@ -0,0 +1,227 @@
+.global kernel_main, __bss, __bss_end, __stack_top
+
+.section .rodata
+
+panic_message: .asciz "\nPanic"
+.equ PANIC_MESSAGE_SIZE, . - panic_message
+
+.section .text
+
+bzero:
+	la t0, __bss
+	la t1, __bss_end
+
+.Lbzero_loop:
+	bgt t0, t1, .Lbzero_end
+	sw zero, (t0)
+	addi t0, t0, 4
+
+.Lbzero_end:
+	ret
+
+.type kernel_main, @function
+kernel_main:
+	# Prologue.
+	addi sp, sp, -32
+	sw ra, 28(sp)
+	sw s0, 24(sp)
+	addi s0, sp, 32
+
+	la t0, kernel_entry
+	csrw stvec, t0
+
+	mv a0, a1
+	call device_tree
+
+	# Prepare the kernel root memory table.
+	la a0, __kernel_base
+	srli a0, a0, 22
+	andi a0, a0, 0x3ff # VPN[1].
+
+	# Multiply VPN[1] by 4 and add to the start address of the page table.
+	# This gives the physical address of the page table entry.
+	la t0, __free_ram
+	slli a0, a0, 2
+	add a0, t0, a0
+
+	# Calculate PPN[1] (10 most significant bits of the physical address
+	# and map it to 12 bits of the table page entry.
+	la a1, __kernel_base
+	srli a1, a1, 2
+	li t0, 0xff300000
+	and a1, a1, t0
+	ori a1, a1, 0b1111
+
+	sw a1, (a0)	# Save the page entry.
+
+	la a0, __free_ram
+	srli a0, a0, 12
+	li t0, 0x80000000
+	or a0, a0, t0
+
+	sfence.vma
+	csrw satp, a0
+	sfence.vma
+
+	# Do nothing in a loop.
+.Lkernel_main:
+	j .Lkernel_main
+
+	# Epilogue.
+	lw ra, 28(sp)
+	lw s0, 24(sp)
+	addi sp, sp, 32
+	ret
+
+.balign 4
+.type kernel_entry, @function
+kernel_entry:
+	csrw sscratch, sp
+	addi sp, sp, -4 * 31
+
+	sw ra, 0(sp)
+	sw gp, 4(sp)
+	sw tp, 8(sp)
+	sw t0, 12(sp)
+	sw t1, 16(sp)
+	sw t2, 20(sp)
+	sw t3, 24(sp)
+	sw t4, 28(sp)
+	sw t5, 32(sp)
+	sw t6, 36(sp)
+	sw a0, 40(sp)
+	sw a1, 44(sp)
+	sw a2, 48(sp)
+	sw a3, 52(sp)
+	sw a4, 56(sp)
+	sw a5, 60(sp)
+	sw a6, 64(sp)
+	sw a7, 68(sp)
+	sw s0, 72(sp)
+	sw s1, 76(sp)
+	sw s2, 80(sp)
+	sw s3, 84(sp)
+	sw s4, 88(sp)
+	sw s5, 92(sp)
+	sw s6, 96(sp)
+	sw s7, 100(sp)
+	sw s8, 104(sp)
+	sw s9, 108(sp)
+	sw s10, 112(sp)
+	sw s11, 116(sp)
+
+	csrr a0, sscratch
+	sw a0, 120(sp)
+
+	mv a0, sp
+	call handle_trap
+
+	lw ra, 0(sp)
+	lw gp, 4(sp)
+	lw tp, 8(sp)
+	lw t0, 12(sp)
+	lw t1, 16(sp)
+	lw t2, 20(sp)
+	lw t3, 24(sp)
+	lw t4, 28(sp)
+	lw t5, 32(sp)
+	lw t6, 36(sp)
+	lw a0, 40(sp)
+	lw a1, 44(sp)
+	lw a2, 48(sp)
+	lw a3, 52(sp)
+	lw a4, 56(sp)
+	lw a5, 60(sp)
+	lw a6, 64(sp)
+	lw a7, 68(sp)
+	lw s0, 72(sp)
+	lw s1, 76(sp)
+	lw s2, 80(sp)
+	lw s3, 84(sp)
+	lw s4, 88(sp)
+	lw s5, 92(sp)
+	lw s6, 96(sp)
+	lw s7, 100(sp)
+	lw s8, 104(sp)
+	lw s9, 108(sp)
+	lw s10, 112(sp)
+	lw s11, 116(sp)
+	lw sp, 120(sp)
+
+	sret
+
+.type handle_trap, @function
+handle_trap:
+	# Prologue.
+	addi sp, sp, -32
+	sw ra, 28(sp)
+	sw s0, 24(sp)
+	addi s0, sp, 32
+
+	csrr t0, scause
+	csrr t1, stval
+	csrr t2, sepc
+
+	li a1, PANIC_MESSAGE_SIZE
+	la a0, panic_message
+	call write_s
+
+	li a0, ' '
+	call write_c
+
+	csrr a0, scause
+	la a1, write_c
+	call print_i
+
+	call separator
+	call write_c
+
+	csrr a0, stval
+	la a1, write_c
+	call print_i
+
+	call separator
+	call write_c
+
+	csrr a0, sepc
+	la a1, write_c
+	call print_i
+
+	call panic
+
+	# Epilogue.
+	lw ra, 28(sp)
+	lw s0, 24(sp)
+	addi sp, sp, 32
+	ret
+
+.type panic, @function
+panic:
+	# Prologue.
+	addi sp, sp, -32
+	sw ra, 28(sp)
+	sw s0, 24(sp)
+	addi s0, sp, 32
+
+	li a0, '\n'
+	call write_c
+.Lpanic:
+	j .Lpanic
+
+	# Epilogue.
+	lw ra, 28(sp)
+	lw s0, 24(sp)
+	addi sp, sp, 32
+	ret
+
+.section .text.boot
+boot:
+	la t0, __stack_top
+	mv sp, t0 # Set the stack pointer
+
+	lw t0, (__free_ram)
+	la t1, next_paddr
+	sw t0, (t1)
+
+	call bzero
+	j kernel_main