4 Commits

Author	SHA1	Message	Date
Eugen Wissner	f5c4a27a6d	Implement a RISC-V backend	2022-06-11 00:38:03 +02:00
Eugen Wissner	77857ad118	Add intermediate assembler representation	2022-06-08 08:34:44 +02:00
Eugen Wissner	aa6b2504bd	Add an argument parser	2022-06-05 23:43:45 +02:00
Eugen Wissner	5490f6ce1c	Initial commit	2022-06-05 15:16:04 +02:00