7 Commits

Author	SHA1	Message	Date
Eugen Wissner	52b9152158	Support nil literals	2025-11-20 15:43:08 +01:00
Eugen Wissner	fd9e8a36b5	Add jump_if_not_zero and bnez instructions	2025-11-19 13:05:51 +01:00
Eugen Wissner	76f55d0796	Rename RTL instructions to Risc-V versions	2025-11-18 20:10:34 +01:00
Eugen Wissner	8da9241233	Use custom 3-address code operands	2025-11-16 09:26:13 +01:00
Eugen Wissner	cc3acdfd12	Handle immediate values in RTL	2025-11-13 20:40:17 +01:00
Eugen Wissner	c24373927c	Add assembly generation stage	2025-11-12 20:07:24 +01:00
Eugen Wissner	d144cb2101	Move stages into subdirectories	2025-11-08 11:07:39 +01:00