Split code generation from the ui
This commit is contained in:
185
backend/riscv.cpp
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185
backend/riscv.cpp
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#include "elna/backend/riscv.hpp"
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#include <memory>
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namespace elna::backend
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{
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Instruction::Instruction(BaseOpcode opcode)
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{
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this->instruction = static_cast<std::underlying_type<BaseOpcode>::type>(opcode);
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}
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Instruction& Instruction::i(XRegister rd, Funct3 funct3, XRegister rs1, std::uint32_t immediate)
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{
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this->instruction |= (static_cast<std::underlying_type<XRegister>::type>(rd) << 7)
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| (static_cast<std::underlying_type<Funct3>::type>(funct3) << 12)
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| (static_cast<std::underlying_type<XRegister>::type>(rs1) << 15)
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| (immediate << 20);
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return *this;
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}
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Instruction& Instruction::s(std::uint32_t imm1, Funct3 funct3, XRegister rs1, XRegister rs2)
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{
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this->instruction |= ((imm1 & 0b11111) << 7)
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| (static_cast<std::underlying_type<Funct3>::type>(funct3) << 12)
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| (static_cast<std::underlying_type<XRegister>::type>(rs1) << 15)
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| (static_cast<std::underlying_type<XRegister>::type>(rs2) << 20)
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| ((imm1 & 0b111111100000) << 20);
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return *this;
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}
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Instruction& Instruction::r(XRegister rd, Funct3 funct3, XRegister rs1, XRegister rs2, Funct7 funct7)
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{
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this->instruction |= (static_cast<std::underlying_type<XRegister>::type>(rd) << 7)
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| (static_cast<std::underlying_type<Funct3>::type>(funct3) << 12)
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| (static_cast<std::underlying_type<XRegister>::type>(rs1) << 15)
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| (static_cast<std::underlying_type<XRegister>::type>(rs2) << 20)
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| (static_cast<std::underlying_type<Funct7>::type>(funct7) << 25);
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return *this;
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}
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Instruction& Instruction::u(XRegister rd, std::uint32_t imm)
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{
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this->instruction |= (static_cast<std::underlying_type<XRegister>::type>(rd) << 7) | (imm << 12);
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return *this;
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}
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const std::byte *Instruction::cbegin() const
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{
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return reinterpret_cast<const std::byte *>(&this->instruction);
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}
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const std::byte *Instruction::cend() const
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{
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return reinterpret_cast<const std::byte *>(&this->instruction) + sizeof(this->instruction);
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}
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void RiscVVisitor::visit(source::definition *definition)
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{
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constants[definition->identifier()] = definition->body().number();
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}
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void RiscVVisitor::visit(source::block *block)
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{
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for (const auto& block_definition : block->definitions())
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{
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block_definition->accept(this);
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}
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block->body().accept(this);
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// Prologue.
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const uint stackSize = static_cast<std::uint32_t>(variableCounter * 4 + 12);
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this->instructions.push_back(Instruction(BaseOpcode::opImm)
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.i(XRegister::sp, Funct3::addi, XRegister::sp, -stackSize));
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this->instructions.push_back(Instruction(BaseOpcode::store)
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.s(stackSize - 4, Funct3::sw, XRegister::sp, XRegister::s0));
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this->instructions.push_back(Instruction(BaseOpcode::store)
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.s(stackSize - 8, Funct3::sw, XRegister::sp, XRegister::ra));
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this->instructions.push_back(Instruction(BaseOpcode::opImm)
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.i(XRegister::s0, Funct3::addi, XRegister::sp, stackSize));
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// Print the result.
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this->instructions.push_back(Instruction(BaseOpcode::opImm)
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.i(XRegister::a1, Funct3::addi, XRegister::a0, 0));
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this->references[0] = Reference();
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this->references[0].name = ".CL0";
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this->references[0].offset = instructions.size() * 4;
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this->references[0].target = Target::high20;
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this->instructions.push_back(Instruction(BaseOpcode::lui).u(XRegister::a5, 0));
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this->references[1] = Reference();
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this->references[1].name = ".CL0";
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this->references[1].offset = instructions.size() * 4;
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this->references[1].target = Target::lower12i;
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this->instructions.push_back(Instruction(BaseOpcode::opImm)
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.i(XRegister::a0, Funct3::addi, XRegister::a5, 0));
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this->references[2] = Reference();
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this->references[2].name = "printf";
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this->references[2].offset = instructions.size() * 4;
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this->references[2].target = Target::text;
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this->instructions.push_back(Instruction(BaseOpcode::auipc).u(XRegister::ra, 0));
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this->instructions.push_back(Instruction(BaseOpcode::jalr)
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.i(XRegister::ra, Funct3::jalr, XRegister::ra, 0));
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// Set the return value (0).
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this->instructions.push_back(Instruction(BaseOpcode::op)
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.r(XRegister::a0, Funct3::_and, XRegister::zero, XRegister::zero));
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// Epilogue.
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this->instructions.push_back(Instruction(BaseOpcode::load)
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.i(XRegister::s0, Funct3::lw, XRegister::sp, stackSize - 4));
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this->instructions.push_back(Instruction(BaseOpcode::load)
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.i(XRegister::ra, Funct3::lw, XRegister::sp, stackSize - 8));
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this->instructions.push_back(Instruction(BaseOpcode::opImm)
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.i(XRegister::sp, Funct3::addi, XRegister::sp, stackSize));
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this->instructions.push_back(Instruction(BaseOpcode::jalr)
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.i(XRegister::zero, Funct3::jalr, XRegister::ra, 0));
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}
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void RiscVVisitor::visit(source::bang_statement *statement)
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{
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statement->body().accept(this);
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}
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void RiscVVisitor::visit(source::variable_expression *variable)
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{
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const auto freeRegister = this->registerInUse ? XRegister::a0 : XRegister::t0;
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this->instructions.push_back(
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Instruction(BaseOpcode::opImm) // movl $x, %eax; where $x is a number.
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.i(freeRegister, Funct3::addi, XRegister::zero, constants[variable->name()])
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);
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}
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void RiscVVisitor::visit(source::integer_literal *number)
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{
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const auto freeRegister = this->registerInUse ? XRegister::a0 : XRegister::t0;
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this->instructions.push_back(
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Instruction(BaseOpcode::opImm) // movl $x, %eax; where $x is a number.
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.i(freeRegister, Funct3::addi, XRegister::zero, number->number())
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);
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}
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void RiscVVisitor::visit(source::binary_expression *expression)
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{
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const auto lhs_register = this->registerInUse ? XRegister::a0 : XRegister::t0;
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this->registerInUse = true;
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expression->lhs().accept(this);
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this->instructions.push_back( // movl %eax, -x(%rbp); where x is a number.
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Instruction(BaseOpcode::store)
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.s(static_cast<std::uint32_t>(this->variableCounter * 4), Funct3::sw, XRegister::sp, XRegister::a0)
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);
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auto lhs_stack_position = ++this->variableCounter;
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this->registerInUse = false;
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expression->rhs().accept(this);
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this->instructions.push_back(Instruction(BaseOpcode::load)
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.i(XRegister::a0, Funct3::lw, XRegister::sp,
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static_cast<std::int8_t>((lhs_stack_position - 1) * 4))
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);
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// Calculate the result and assign it to a variable on the stack.
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switch (expression->operation())
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{
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case source::binary_operator::sum:
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this->instructions.push_back(Instruction(BaseOpcode::op)
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.r(lhs_register, Funct3::add, XRegister::a0, XRegister::t0));
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break;
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case source::binary_operator::subtraction:
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this->instructions.push_back(Instruction(BaseOpcode::op)
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.r(lhs_register, Funct3::sub, XRegister::a0, XRegister::t0, Funct7::sub));
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break;
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case source::binary_operator::multiplication:
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this->instructions.push_back(Instruction(BaseOpcode::op)
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.r(lhs_register, Funct3::mul, XRegister::a0, XRegister::t0, Funct7::muldiv));
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break;
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}
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}
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}
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84
backend/target.cpp
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84
backend/target.cpp
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@ -0,0 +1,84 @@
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#include "elna/backend/target.hpp"
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#include "elna/backend/riscv.hpp"
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#include <elfio/elfio.hpp>
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namespace elna::backend
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{
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void riscv32_elf(source::block *ast, const std::filesystem::path& out_file)
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{
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auto visitor = std::make_unique<RiscVVisitor>();
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visitor->visit(ast);
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ELFIO::elfio writer;
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const ELFIO::Elf_Word instructions_size = visitor->instructions.size() * sizeof(Instruction);
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writer.create(ELFIO::ELFCLASS32, ELFIO::ELFDATA2LSB);
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writer.set_os_abi(ELFIO::ELFOSABI_NONE);
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writer.set_type(ELFIO::ET_REL);
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writer.set_machine(ELFIO::EM_RISCV);
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// Create code section
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ELFIO::section* text_sec = writer.sections.add(".text");
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text_sec->set_type(ELFIO::SHT_PROGBITS);
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text_sec->set_flags(ELFIO::SHF_ALLOC | ELFIO::SHF_EXECINSTR);
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text_sec->set_addr_align(0x1);
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text_sec->set_data(reinterpret_cast<const char *>(visitor->instructions.data()),
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instructions_size);
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// Create string table section
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ELFIO::section* str_sec = writer.sections.add(".strtab");
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str_sec->set_type(ELFIO::SHT_STRTAB);
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// Create string table writer
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ELFIO::string_section_accessor stra(str_sec);
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// Add label name
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ELFIO::Elf32_Word str_index = stra.add_string("msg");
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// Create read only data section
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ELFIO::section* ro_sec = writer.sections.add(".rodata");
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ro_sec->set_type(ELFIO::SHT_PROGBITS);
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ro_sec->set_flags(ELFIO::SHF_ALLOC);
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ro_sec->set_addr_align(0x4);
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ro_sec->set_data("%d\n");
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// Create symbol table section
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ELFIO::section* sym_sec = writer.sections.add(".symtab");
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sym_sec->set_type(ELFIO::SHT_SYMTAB);
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sym_sec->set_info(2);
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sym_sec->set_addr_align(0x4);
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sym_sec->set_entry_size(writer.get_default_entry_size(ELFIO::SHT_SYMTAB));
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sym_sec->set_link(str_sec->get_index());
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// Create symbol table writer
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ELFIO::symbol_section_accessor syma(writer, sym_sec);
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auto label_sym = syma.add_symbol(stra, ".CL0", 0x00000000, strlen("%d\n") + 1,
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ELFIO::STB_LOCAL, ELFIO::STT_NOTYPE, 0, ro_sec->get_index());
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syma.add_symbol(stra, "main", 0x00000000, instructions_size,
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ELFIO::STB_GLOBAL, ELFIO::STT_FUNC, 0, text_sec->get_index());
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auto printf_sym = syma.add_symbol(stra, "printf", 0x00000000, 0,
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ELFIO::STB_GLOBAL, ELFIO::STT_NOTYPE, 0, ELFIO::SHN_UNDEF);
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// Create relocation table section
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ELFIO::section* rel_sec = writer.sections.add(".rel.text");
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rel_sec->set_type(ELFIO::SHT_REL);
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rel_sec->set_info(text_sec->get_index());
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rel_sec->set_addr_align(0x4);
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rel_sec->set_entry_size(writer.get_default_entry_size(ELFIO::SHT_REL));
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rel_sec->set_link(sym_sec->get_index());
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rel_sec->set_flags(ELFIO::SHF_ALLOC);
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// Create relocation table writer
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ELFIO::relocation_section_accessor rela(writer, rel_sec);
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// Add relocation entry (adjust address at offset 11)
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rela.add_entry(visitor->references[0].offset, label_sym, 26 /* ELFIO::R_RISCV_HI20 */);
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rela.add_entry(visitor->references[0].offset, label_sym, 51 /* ELFIO::R_RISCV_RELAX */);
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rela.add_entry(visitor->references[1].offset, label_sym, 27 /* ELFIO::R_RISCV_LO12_I */);
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rela.add_entry(visitor->references[1].offset, label_sym, 51 /* ELFIO::R_RISCV_RELAX */);
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rela.add_entry(visitor->references[2].offset, printf_sym, 18 /* ELFIO::R_RISCV_CALL */);
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rela.add_entry(visitor->references[2].offset, printf_sym, 51 /* ELFIO::R_RISCV_RELAX */);
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// Create ELF object file
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writer.save(out_file);
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}
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}
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