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Implement division

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This commit is contained in:
Eugen Wissner
2024-03-09 08:36:07 +01:00
parent 4ac29669ad
commit 1af995eafd
25 changed files with 357 additions and 245 deletions
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173
backend/riscv.cpp
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@ -1,68 +1,68 @@
#include "elna/backend/riscv.hpp"
#include <memory>
namespace elna::backend
namespace elna::riscv
{
Instruction::Instruction(BaseOpcode opcode)
instruction::instruction(base_opcode opcode)
{
this->instruction = static_cast<std::underlying_type<BaseOpcode>::type>(opcode);
this->representation = static_cast<std::underlying_type<base_opcode>::type>(opcode);
}
Instruction& Instruction::i(XRegister rd, Funct3 funct3, XRegister rs1, std::uint32_t immediate)
instruction& instruction::i(x_register rd, funct3_t funct3, x_register rs1, std::uint32_t immediate)
{
this->instruction |= (static_cast<std::underlying_type<XRegister>::type>(rd) << 7)
| (static_cast<std::underlying_type<Funct3>::type>(funct3) << 12)
| (static_cast<std::underlying_type<XRegister>::type>(rs1) << 15)
this->representation |= (static_cast<std::underlying_type<x_register>::type>(rd) << 7)
| (static_cast<std::underlying_type<funct3_t>::type>(funct3) << 12)
| (static_cast<std::underlying_type<x_register>::type>(rs1) << 15)
| (immediate << 20);
return *this;
}
Instruction& Instruction::s(std::uint32_t imm1, Funct3 funct3, XRegister rs1, XRegister rs2)
instruction& instruction::s(std::uint32_t imm1, funct3_t funct3, x_register rs1, x_register rs2)
{
this->instruction |= ((imm1 & 0b11111) << 7)
| (static_cast<std::underlying_type<Funct3>::type>(funct3) << 12)
| (static_cast<std::underlying_type<XRegister>::type>(rs1) << 15)
| (static_cast<std::underlying_type<XRegister>::type>(rs2) << 20)
this->representation |= ((imm1 & 0b11111) << 7)
| (static_cast<std::underlying_type<funct3_t>::type>(funct3) << 12)
| (static_cast<std::underlying_type<x_register>::type>(rs1) << 15)
| (static_cast<std::underlying_type<x_register>::type>(rs2) << 20)
| ((imm1 & 0b111111100000) << 20);
return *this;
}
Instruction& Instruction::r(XRegister rd, Funct3 funct3, XRegister rs1, XRegister rs2, Funct7 funct7)
instruction& instruction::r(x_register rd, funct3_t funct3, x_register rs1, x_register rs2, funct7_t funct7)
{
this->instruction |= (static_cast<std::underlying_type<XRegister>::type>(rd) << 7)
| (static_cast<std::underlying_type<Funct3>::type>(funct3) << 12)
| (static_cast<std::underlying_type<XRegister>::type>(rs1) << 15)
| (static_cast<std::underlying_type<XRegister>::type>(rs2) << 20)
| (static_cast<std::underlying_type<Funct7>::type>(funct7) << 25);
this->representation |= (static_cast<std::underlying_type<x_register>::type>(rd) << 7)
| (static_cast<std::underlying_type<funct3_t>::type>(funct3) << 12)
| (static_cast<std::underlying_type<x_register>::type>(rs1) << 15)
| (static_cast<std::underlying_type<x_register>::type>(rs2) << 20)
| (static_cast<std::underlying_type<funct7_t>::type>(funct7) << 25);
return *this;
}
Instruction& Instruction::u(XRegister rd, std::uint32_t imm)
instruction& instruction::u(x_register rd, std::uint32_t imm)
{
this->instruction |= (static_cast<std::underlying_type<XRegister>::type>(rd) << 7) | (imm << 12);
this->representation |= (static_cast<std::underlying_type<x_register>::type>(rd) << 7) | (imm << 12);
return *this;
}
const std::byte *Instruction::cbegin() const
const std::byte *instruction::cbegin() const
{
return reinterpret_cast<const std::byte *>(&this->instruction);
return reinterpret_cast<const std::byte *>(&this->representation);
}
const std::byte *Instruction::cend() const
const std::byte *instruction::cend() const
{
return reinterpret_cast<const std::byte *>(&this->instruction) + sizeof(this->instruction);
return reinterpret_cast<const std::byte *>(&this->representation) + sizeof(this->representation);
}
void RiscVVisitor::visit(source::definition *definition)
void visitor::visit(source::definition *definition)
{
constants[definition->identifier()] = definition->body().number();
}
void RiscVVisitor::visit(source::block *block)
void visitor::visit(source::block *block)
{
for (const auto& block_definition : block->definitions())
{
@ -71,97 +71,100 @@ namespace elna::backend
block->body().accept(this);
// Prologue.
const uint stackSize = static_cast<std::uint32_t>(variableCounter * 4 + 12);
const uint stackSize = static_cast<std::uint32_t>(variable_counter * 4 + 12);
this->instructions.push_back(Instruction(BaseOpcode::opImm)
.i(XRegister::sp, Funct3::addi, XRegister::sp, -stackSize));
this->instructions.push_back(Instruction(BaseOpcode::store)
.s(stackSize - 4, Funct3::sw, XRegister::sp, XRegister::s0));
this->instructions.push_back(Instruction(BaseOpcode::store)
.s(stackSize - 8, Funct3::sw, XRegister::sp, XRegister::ra));
this->instructions.push_back(Instruction(BaseOpcode::opImm)
.i(XRegister::s0, Funct3::addi, XRegister::sp, stackSize));
std::vector<instruction> prologue{
instruction(base_opcode::opImm)
.i(x_register::sp, funct3_t::addi, x_register::sp, -stackSize),
instruction(base_opcode::store)
.s(stackSize - 4, funct3_t::sw, x_register::sp, x_register::s0),
instruction(base_opcode::store)
.s(stackSize - 8, funct3_t::sw, x_register::sp, x_register::ra),
instruction(base_opcode::opImm)
.i(x_register::s0, funct3_t::addi, x_register::sp, stackSize)
};
this->instructions.insert(this->instructions.cbegin(), prologue.begin(), prologue.end());
// Print the result.
this->instructions.push_back(Instruction(BaseOpcode::opImm)
.i(XRegister::a1, Funct3::addi, XRegister::a0, 0));
this->references[0] = Reference();
this->instructions.push_back(instruction(base_opcode::opImm)
.i(x_register::a1, funct3_t::addi, x_register::a0, 0));
this->references[0] = reference();
this->references[0].name = ".CL0";
this->references[0].offset = instructions.size() * 4;
this->references[0].target = Target::high20;
this->instructions.push_back(Instruction(BaseOpcode::lui).u(XRegister::a5, 0));
this->references[1] = Reference();
this->references[0].target = address_t::high20;
this->instructions.push_back(instruction(base_opcode::lui).u(x_register::a5, 0));
this->references[1] = reference();
this->references[1].name = ".CL0";
this->references[1].offset = instructions.size() * 4;
this->references[1].target = Target::lower12i;
this->references[1].target = address_t::lower12i;
this->instructions.push_back(Instruction(BaseOpcode::opImm)
.i(XRegister::a0, Funct3::addi, XRegister::a5, 0));
this->references[2] = Reference();
this->instructions.push_back(instruction(base_opcode::opImm)
.i(x_register::a0, funct3_t::addi, x_register::a5, 0));
this->references[2] = reference();
this->references[2].name = "printf";
this->references[2].offset = instructions.size() * 4;
this->references[2].target = Target::text;
this->instructions.push_back(Instruction(BaseOpcode::auipc).u(XRegister::ra, 0));
this->instructions.push_back(Instruction(BaseOpcode::jalr)
.i(XRegister::ra, Funct3::jalr, XRegister::ra, 0));
this->references[2].target = address_t::text;
this->instructions.push_back(instruction(base_opcode::auipc).u(x_register::ra, 0));
this->instructions.push_back(instruction(base_opcode::jalr)
.i(x_register::ra, funct3_t::jalr, x_register::ra, 0));
// Set the return value (0).
this->instructions.push_back(Instruction(BaseOpcode::op)
.r(XRegister::a0, Funct3::_and, XRegister::zero, XRegister::zero));
this->instructions.push_back(instruction(base_opcode::op)
.r(x_register::a0, funct3_t::_and, x_register::zero, x_register::zero));
// Epilogue.
this->instructions.push_back(Instruction(BaseOpcode::load)
.i(XRegister::s0, Funct3::lw, XRegister::sp, stackSize - 4));
this->instructions.push_back(Instruction(BaseOpcode::load)
.i(XRegister::ra, Funct3::lw, XRegister::sp, stackSize - 8));
this->instructions.push_back(Instruction(BaseOpcode::opImm)
.i(XRegister::sp, Funct3::addi, XRegister::sp, stackSize));
this->instructions.push_back(Instruction(BaseOpcode::jalr)
.i(XRegister::zero, Funct3::jalr, XRegister::ra, 0));
this->instructions.push_back(instruction(base_opcode::load)
.i(x_register::s0, funct3_t::lw, x_register::sp, stackSize - 4));
this->instructions.push_back(instruction(base_opcode::load)
.i(x_register::ra, funct3_t::lw, x_register::sp, stackSize - 8));
this->instructions.push_back(instruction(base_opcode::opImm)
.i(x_register::sp, funct3_t::addi, x_register::sp, stackSize));
this->instructions.push_back(instruction(base_opcode::jalr)
.i(x_register::zero, funct3_t::jalr, x_register::ra, 0));
}
void RiscVVisitor::visit(source::bang_statement *statement)
void visitor::visit(source::bang_statement *statement)
{
statement->body().accept(this);
}
void RiscVVisitor::visit(source::variable_expression *variable)
void visitor::visit(source::variable_expression *variable)
{
const auto freeRegister = this->registerInUse ? XRegister::a0 : XRegister::t0;
const auto free_register = this->register_in_use ? x_register::a0 : x_register::t0;
this->instructions.push_back(
Instruction(BaseOpcode::opImm) // movl $x, %eax; where $x is a number.
.i(freeRegister, Funct3::addi, XRegister::zero, constants[variable->name()])
instruction(base_opcode::opImm) // movl $x, %eax; where $x is a number.
.i(free_register, funct3_t::addi, x_register::zero, constants[variable->name()])
);
}
void RiscVVisitor::visit(source::integer_literal *number)
void visitor::visit(source::integer_literal *number)
{
const auto freeRegister = this->registerInUse ? XRegister::a0 : XRegister::t0;
const auto free_register = this->register_in_use ? x_register::a0 : x_register::t0;
this->instructions.push_back(
Instruction(BaseOpcode::opImm) // movl $x, %eax; where $x is a number.
.i(freeRegister, Funct3::addi, XRegister::zero, number->number())
instruction(base_opcode::opImm) // movl $x, %eax; where $x is a number.
.i(free_register, funct3_t::addi, x_register::zero, number->number())
);
}
void RiscVVisitor::visit(source::binary_expression *expression)
void visitor::visit(source::binary_expression *expression)
{
const auto lhs_register = this->registerInUse ? XRegister::a0 : XRegister::t0;
const auto lhs_register = this->register_in_use ? x_register::a0 : x_register::t0;
this->registerInUse = true;
this->register_in_use = true;
expression->lhs().accept(this);
this->instructions.push_back( // movl %eax, -x(%rbp); where x is a number.
Instruction(BaseOpcode::store)
.s(static_cast<std::uint32_t>(this->variableCounter * 4), Funct3::sw, XRegister::sp, XRegister::a0)
instruction(base_opcode::store)
.s(static_cast<std::uint32_t>(this->variable_counter * 4), funct3_t::sw, x_register::sp, x_register::a0)
);
auto lhs_stack_position = ++this->variableCounter;
auto lhs_stack_position = ++this->variable_counter;
this->registerInUse = false;
this->register_in_use = false;
expression->rhs().accept(this);
this->instructions.push_back(Instruction(BaseOpcode::load)
.i(XRegister::a0, Funct3::lw, XRegister::sp,
this->instructions.push_back(instruction(base_opcode::load)
.i(x_register::a0, funct3_t::lw, x_register::sp,
static_cast<std::int8_t>((lhs_stack_position - 1) * 4))
);
@ -169,16 +172,20 @@ namespace elna::backend
switch (expression->operation())
{
case source::binary_operator::sum:
this->instructions.push_back(Instruction(BaseOpcode::op)
.r(lhs_register, Funct3::add, XRegister::a0, XRegister::t0));
this->instructions.push_back(instruction(base_opcode::op)
.r(lhs_register, funct3_t::add, x_register::a0, x_register::t0));
break;
case source::binary_operator::subtraction:
this->instructions.push_back(Instruction(BaseOpcode::op)
.r(lhs_register, Funct3::sub, XRegister::a0, XRegister::t0, Funct7::sub));
this->instructions.push_back(instruction(base_opcode::op)
.r(lhs_register, funct3_t::sub, x_register::a0, x_register::t0, funct7_t::sub));
break;
case source::binary_operator::multiplication:
this->instructions.push_back(Instruction(BaseOpcode::op)
.r(lhs_register, Funct3::mul, XRegister::a0, XRegister::t0, Funct7::muldiv));
this->instructions.push_back(instruction(base_opcode::op)
.r(lhs_register, funct3_t::mul, x_register::a0, x_register::t0, funct7_t::muldiv));
break;
case source::binary_operator::division:
this->instructions.push_back(instruction(base_opcode::op)
.r(lhs_register, funct3_t::div, x_register::a0, x_register::t0, funct7_t::muldiv));
break;
}
}

22
backend/target.cpp
View File

@ -2,15 +2,15 @@
#include "elna/backend/riscv.hpp"
#include <elfio/elfio.hpp>
namespace elna::backend
namespace elna::riscv
{
void riscv32_elf(source::block *ast, const std::filesystem::path& out_file)
{
auto visitor = std::make_unique<RiscVVisitor>();
visitor->visit(ast);
auto _visitor = std::make_unique<visitor>();
_visitor->visit(ast);
ELFIO::elfio writer;
const ELFIO::Elf_Word instructions_size = visitor->instructions.size() * sizeof(Instruction);
const ELFIO::Elf_Word instructions_size = _visitor->instructions.size() * sizeof(instruction);
writer.create(ELFIO::ELFCLASS32, ELFIO::ELFDATA2LSB);
@ -23,7 +23,7 @@ namespace elna::backend
text_sec->set_type(ELFIO::SHT_PROGBITS);
text_sec->set_flags(ELFIO::SHF_ALLOC | ELFIO::SHF_EXECINSTR);
text_sec->set_addr_align(0x1);
text_sec->set_data(reinterpret_cast<const char *>(visitor->instructions.data()),
text_sec->set_data(reinterpret_cast<const char *>(_visitor->instructions.data()),
instructions_size);
// Create string table section
@ -71,12 +71,12 @@ namespace elna::backend
// Create relocation table writer
ELFIO::relocation_section_accessor rela(writer, rel_sec);
// Add relocation entry (adjust address at offset 11)
rela.add_entry(visitor->references[0].offset, label_sym, 26 /* ELFIO::R_RISCV_HI20 */);
rela.add_entry(visitor->references[0].offset, label_sym, 51 /* ELFIO::R_RISCV_RELAX */);
rela.add_entry(visitor->references[1].offset, label_sym, 27 /* ELFIO::R_RISCV_LO12_I */);
rela.add_entry(visitor->references[1].offset, label_sym, 51 /* ELFIO::R_RISCV_RELAX */);
rela.add_entry(visitor->references[2].offset, printf_sym, 18 /* ELFIO::R_RISCV_CALL */);
rela.add_entry(visitor->references[2].offset, printf_sym, 51 /* ELFIO::R_RISCV_RELAX */);
rela.add_entry(_visitor->references[0].offset, label_sym, 26 /* ELFIO::R_RISCV_HI20 */);
rela.add_entry(_visitor->references[0].offset, label_sym, 51 /* ELFIO::R_RISCV_RELAX */);
rela.add_entry(_visitor->references[1].offset, label_sym, 27 /* ELFIO::R_RISCV_LO12_I */);
rela.add_entry(_visitor->references[1].offset, label_sym, 51 /* ELFIO::R_RISCV_RELAX */);
rela.add_entry(_visitor->references[2].offset, printf_sym, 18 /* ELFIO::R_RISCV_CALL */);
rela.add_entry(_visitor->references[2].offset, printf_sym, 51 /* ELFIO::R_RISCV_RELAX */);
// Create ELF object file
writer.save(out_file);